A single instruction, multiple data (SIMD) processor essentially consists of a single program control unit (PCU) that controls the data processing of any number of data channels. FIG. 1A illustrates one possible SIMD configuration, represented by the numeral 10. The PCU 12 is coupled to N data paths 13, implying a parallel-processing scheme. Each data path 13 is coupled to a data memory 14 and a processor 15.
FIG. 1B illustrates a second SIMD configuration, represented by the numeral 16. In this configuration, the sharing of the instruction is done serially by time division multiplexing the processing in a data path 18 for all channels. The data is, therefore, changed N times at the input to the data processor 15 for every instruction that is produced.
The advantages that the SIMD architecture provides are savings in both power consumption and area reduction when compared to a solution using dedicated processors for each data path, or channel. The savings come from having only one PCU 12 and one program memory. If the data path processor is also being time shared, as in FIG. 1B, further savings in area reduction are realized. However, the processor must be able run at higher speeds to accommodate multiple channels. Furthermore, simplifications are also made at a higher level, since there is only one program load to manage and track. Having only one program load reduces start-up times if download times are consuming a large portion of time.
As described in the various standards defining the different flavors of digital subscriber line (DSL) systems, the procedure from power-up to run time operation takes modems through a series of handshakes and initialization procedures. These procedures require the modems to handle different data rates while maintaining a constant carrier frequency profile. In a multiple channel system, the assumption is that all channels may not be in the same state at any given time.
The maintenance of the constant carrier frequencies facilitates reuse of program code to perform some of the necessary tasks such as fast Fourier transforms (FFTs), equalization and the like. However, the changing data rates make it difficult to use one processor for performing symbol-based operations on multiple channels. This is due to the fact that the modem cannot synchronize all channels with its own processing rate since the symbol rate for all channels is not equal. Therefore, the presence of different rates in a multi channel system precludes using a constant rate processor for all channels.
It is an object of the present invention to obviate or mitigate some of the above disadvantages.